Sigma-delta modulators may be used to perform analog-to-digital or digital-to-analog conversion. To perform analog-to-digital conversion, for example, a conventional sigma-delta modulator measures and integrates the error in a signal, and performs error correction based on the integrated error. A conventional sigma-delta modulator may include at least one integrator, at least one feedback loop, and a quantizer. The order of the sigma-delta modulator is determined by the number of integrators.
A “single-sampling” sigma-delta modulator samples on one clock phase and integrates on the other clock phase. The differential amplifiers associated with the integrators of a single-sampling sigma-delta modulator are active only during the integration phase. Accordingly, both bandwidth and power are wasted when the differential amplifiers are idle during the sampling phase. A “double-sampling” sigma-delta modulator compensates for these deficiencies in single-sampling sigma-delta modulators by including a double-sampling integrator system. In such a system, sampling and integration are performed on both phases of a clock, thus achieving improved bandwidth and power consumption when compared with single-sampling sigma-delta modulators.
Although double-sampling sigma-delta modulators have advantages over single-sampling sigma-delta modulators, they may be improved. For example, some conventional double-sampling integrator systems have both continuous-time and discrete-time inputs (e.g., resistors and switched capacitor circuits, respectively). For a continuous-time input, the voltage at the input of the amplifier of an opamp-based integrator does not have to be small in order for the integrator system to perform well. However, for a discrete-time input, which may correspond to a feedback signal provided through a feedback loop, for example, the voltage at the input of the amplifier of an opamp-based integrator must be small after settling to avoid retaining a residual charge on the capacitors of the discrete-time input (e.g., the capacitors of the switched capacitor circuit). The inherent input offset may detrimentally affect performance by introducing a non-negligible second order harmonic. In order to address this discrepancy, some conventional double-sampling integrator systems include amplifiers with relatively large transconductance requirements. However, a drawback to such a system is the increased power consumption associated with the large-transconductance amplifier.
Accordingly, what is needed is a double-sampling integrator system that may have both continuous-time and discrete-time inputs, and a feedback sampling circuit that enables an amplifier to be employed that has a relatively small transconductance requirement. Desirably, such an integrator system will have high performance, relatively low power consumption, and a reduced sensitivity to quantizer input offset, when compared with a conventional double-sampling integrator system.